- Am 10. Jul 2025 um 7:53 schrieb Sebastian Huber
sebastian.hu...@embedded-brains.de:
> There are targets, which only offer 32-bit atomic operations (for
> example 32-bit RISC-V). For these targets, split the 64-bit atomic
> bitwise-or operation into two parts.
Could someone please have a l
- Am 15. Aug 2025 um 2:33 schrieb Sebastian Huber
sebastian.hu...@embedded-brains.de:
> - Am 15. Aug 2025 um 0:02 schrieb Jeff Law jeffreya...@gmail.com:
>
>> On 8/13/25 9:00 PM, Sebastian Huber wrote:
>>> Hello Jeff,
>>>
>>> thanks for your comment.
>>>
>>> - Am 10. Jul 2025 um 16
- Am 15. Aug 2025 um 0:02 schrieb Jeff Law jeffreya...@gmail.com:
> On 8/13/25 9:00 PM, Sebastian Huber wrote:
>> Hello Jeff,
>>
>> thanks for your comment.
>>
>> - Am 10. Jul 2025 um 16:01 schrieb Jeff Law jeffreya...@gmail.com:
>>
>>> On 7/9/25 11:53 PM, Sebastian Huber wrote:
Th
On 8/13/25 9:00 PM, Sebastian Huber wrote:
Hello Jeff,
thanks for your comment.
- Am 10. Jul 2025 um 16:01 schrieb Jeff Law jeffreya...@gmail.com:
On 7/9/25 11:53 PM, Sebastian Huber wrote:
There are targets, which only offer 32-bit atomic operations (for
example 32-bit RISC-V). For
Hello Jeff,
thanks for your comment.
- Am 10. Jul 2025 um 16:01 schrieb Jeff Law jeffreya...@gmail.com:
> On 7/9/25 11:53 PM, Sebastian Huber wrote:
>> There are targets, which only offer 32-bit atomic operations (for
>> example 32-bit RISC-V). For these targets, split the 64-bit atomic
>>
On 7/9/25 11:53 PM, Sebastian Huber wrote:
There are targets, which only offer 32-bit atomic operations (for
example 32-bit RISC-V). For these targets, split the 64-bit atomic
bitwise-or operation into two parts.
For this test case
int a(int i);
int b(int i);
int f(int i)
{
if (i) {
