Dominik Vogt wrote:
> On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> > Dominik Vogt wrote:
> > > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > > cases
> > > > where one of those is unused but r5 isn't, however. ]
> > >
> > > This can happen if t
On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> Dominik Vogt wrote:
> > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > cases
> > > where one of those is unused but r5 isn't, however. ]
> >
> > This can happen if the function only uses register pai
Dominik Vogt wrote:
> On Mon, Dec 14, 2015 at 04:08:32PM +0100, Ulrich Weigand wrote:
> > I don't think that r1 is actually safe here. Note that it may be used
> > (unconditionally) as temp register in s390_emit_prologue in certain cases;
> > the upcoming split-stack code will also need to use r1
On Mon, Dec 14, 2015 at 04:08:32PM +0100, Ulrich Weigand wrote:
> Dominik Vogt wrote:
>
> > The attached patch enables using r1 to r4 as the literal pool base pointer
> > if
> > one of them is unused in a leaf function. The unpatched code supports only
> > r5
> > and r13.
>
> I don't think tha
Dominik Vogt wrote:
> The attached patch enables using r1 to r4 as the literal pool base pointer if
> one of them is unused in a leaf function. The unpatched code supports only r5
> and r13.
I don't think that r1 is actually safe here. Note that it may be used
(unconditionally) as temp register
