subject:"Re\: \[PATCH\] RISC\-V\: force arg and target to reg rtx under \-O0"

Re: [PATCH] RISC-V: force arg and target to reg rtx under -O0

2023-06-25 Thread Jeff Law via Gcc-patches

On 6/24/23 21:43, juzhe.zh...@rivai.ai wrote: Hi, Li. Appreciate for catching this! I think it's better: -emit_insn (gen_rtx_SET (gen_lowpart (e.vector_mode (), e.target), src)); +emit_move_insn (gen_lowpart (e.vector_mode (), e.target), src); do this to fix this issue. Agreed. Assuming a va

Re: [PATCH] RISC-V: force arg and target to reg rtx under -O0

2023-06-24 Thread juzhe.zh...@rivai.ai

Hi, Li. Appreciate for catching this! I think it's better: -emit_insn (gen_rtx_SET (gen_lowpart (e.vector_mode (), e.target), src)); +emit_move_insn (gen_lowpart (e.vector_mode (), e.target), src); do this to fix this issue. Thanks. juzhe.zh...@rivai.ai From: Li Xu Date: 2023-06-25 11:08 To: