Re: Re: [PATCH] RISC-V: Enable basic VLS modes support

2023-07-26 Thread 钟居哲
t;> Btw. as a general remark. In the past I also found the single-element >> vectors helpful for codegen but that might be obsolete. Not in scope >> for this patch. Address comments. I saw many targets added single-element vector. I will add it in V2. juzhe.zh...@rivai.ai From:

Re: [PATCH] RISC-V: Enable basic VLS modes support

2023-07-26 Thread Robin Dapp via Gcc-patches
Hi Juzhe, just some small remarks, all in all no major concerns. > + vmv%m1r.v\t%0,%1" > + "&& (!register_operand (operands[0], mode) > + || !register_operand (operands[1], mode))" > + [(const_int 0)] > + { > +unsigned size = GET_MODE_BITSIZE (mode).to_constant (); > +if (size