On Mon, Aug 13, 2012 at 9:39 PM, Igor Zamyatin wrote:
> Main idea of this activity is mostly to provide user a possibility to
> safely turn on first scheduler for his codes. In some cases this could
> positively affect performance, especially for in-order Atom.
>
> It would be great to hear some
On Tue, Aug 14, 2012 at 2:45 PM, Jakub Jelinek wrote:
>> >> 2. Passing function arguments in HW registers.
>> >> The main problem here is that backward copy propagation phase (aka
>> >> combine instructions) can propagate HW argument registers to
>> >> instructions evaluating argument values (e.g
On Tue, Aug 14, 2012 at 2:45 PM, Jakub Jelinek wrote:
> On Tue, Aug 14, 2012 at 02:40:42PM +0200, Richard Guenther wrote:
>> On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak wrote:
>> > On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev
>> > wrote:
>> >
>> >> 2. Passing function arguments in HW regis
On Tue, Aug 14, 2012 at 02:40:42PM +0200, Richard Guenther wrote:
> On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak wrote:
> > On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev wrote:
> >
> >> 2. Passing function arguments in HW registers.
> >> The main problem here is that backward copy propagation
On Tue, Aug 14, 2012 at 2:02 PM, Uros Bizjak wrote:
> On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev wrote:
>
>> 2. Passing function arguments in HW registers.
>> The main problem here is that backward copy propagation phase (aka
>> combine instructions) can propagate HW argument registers to
>
On Tue, Aug 14, 2012 at 1:51 PM, Yuri Rumyantsev wrote:
> 2. Passing function arguments in HW registers.
> The main problem here is that backward copy propagation phase (aka
> combine instructions) can propagate HW argument registers to
> instructions evaluating argument values (e.g. issue#46829
Hi Richard,
These changes try to resolve the known problem with the first
instruction scheduler for x86 platform. The main issue is the
existence of hardware registers that are used for unloading of
function arguments passing in HW registers and for passing function
arguments in HW registers.
1. U
On Tue, Aug 14, 2012 at 10:45:18AM +0200, Uros Bizjak wrote:
> > The 46829 failure is due to combine pass blindly propagating r8 into
> > divmod instruction. This is invalid for divmod, which expects ax
> > there.
> > This can be fixed by introducing "ax_register_operand" predicate, but
> > I think
On Tue, Aug 14, 2012 at 10:36 AM, Uros Bizjak wrote:
>> Patch aims to fix instability introduced by first scheduler on x86. In
>> particular it targets following list:
>>
>> [1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
>> [2] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46829
>> [3] http:
On Mon, Aug 13, 2012 at 9:39 PM, Igor Zamyatin wrote:
> Patch aims to fix instability introduced by first scheduler on x86. In
> particular it targets following list:
>
> [1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
> [2] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46829
> [3] http://gcc
On Mon, Aug 13, 2012 at 9:39 PM, Igor Zamyatin wrote:
> Hi all!
>
> Patch aims to fix instability introduced by first scheduler on x86. In
> particular it targets following list:
>
> [1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46843
> [2] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46829
> [3]
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