Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-29 Thread Michael Meissner
On Wed, Jun 29, 2016 at 05:29:36PM +0100, Alan Hayward wrote: > Hi, > > This patch references the wrong bug. It should reference 71677 and not > 71667 > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71677 > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71667 > > > Thanks, > Alan. Whoops, yes y

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-29 Thread Alan Hayward
Hi, This patch references the wrong bug. It should reference 71677 and not 71667 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71677 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71667 Thanks, Alan. As we discussed in the patch review, there were some issues with using %Y for the ISA 3.0 instr

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-28 Thread Michael Meissner
As we discussed in the patch review, there were some issues with using %Y for the ISA 3.0 instructions LXSD and STXSD. I have rewritten the patch so that we have a new memory constraint (%wY) that explicitly targets those instructions. I went back to the mov{DF,DD} patterns and changed their use

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-28 Thread Michael Meissner
On Tue, Jun 28, 2016 at 12:49:12PM -0500, Segher Boessenkool wrote: > On Tue, Jun 28, 2016 at 01:27:45PM -0400, Michael Meissner wrote: > > > > Thanks for the explanation. > > > I think the thing to do is create yet another memory constraint, that is > > just > > an offsetable address, with th

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-28 Thread Segher Boessenkool
On Tue, Jun 28, 2016 at 01:27:45PM -0400, Michael Meissner wrote: Thanks for the explanation. > I think the thing to do is create yet another memory constraint, that is just > an offsetable address, with the bottom 2 bits 0, and no PRE_MODIFY, etc. That sounds best yes. The current patch seem

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-28 Thread Michael Meissner
On Mon, Jun 27, 2016 at 09:37:16PM -0500, Segher Boessenkool wrote: > On Mon, Jun 27, 2016 at 08:08:20PM -0400, Michael Meissner wrote: > > This patch fixes PR 71667 that I discovered when trying to build the Spec > > 2006 > > xalancbmk benchmark for the Power9. The Altivec indexed memory load/st

Re: [PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

2016-06-27 Thread Segher Boessenkool
On Mon, Jun 27, 2016 at 08:08:20PM -0400, Michael Meissner wrote: > This patch fixes PR 71667 that I discovered when trying to build the Spec 2006 > xalancbmk benchmark for the Power9. The Altivec indexed memory load/stores > need to go before the D-form (register + offset) load/stores, because th