Richard Biener writes:
> On Fri, 13 Nov 2020, Joel Hutton wrote:
>
>> Tests are still running, but I believe I've addressed all the comments.
>>
>> > > +#include
>> > > +
>> >
>> > SVE targets will need a:
>> >
>> > #pragma GCC target "+nosve"
>> >
>> > here, since we'll generate different co
On Fri, 13 Nov 2020, Joel Hutton wrote:
> Tests are still running, but I believe I've addressed all the comments.
>
> > > +#include
> > > +
> >
> > SVE targets will need a:
> >
> > #pragma GCC target "+nosve"
> >
> > here, since we'll generate different code for SVE.
>
> Fixed.
>
> > > +/*
Tests are still running, but I believe I've addressed all the comments.
> > +#include
> > +
>
> SVE targets will need a:
>
> #pragma GCC target "+nosve"
>
> here, since we'll generate different code for SVE.
Fixed.
> > +/* { dg-final { scan-assembler-times "shll\t" 1} } */
> > +/* { dg-final
Joel Hutton via Gcc-patches writes:
> Hi all,
>
> This patch adds support in the aarch64 backend for the vec_widen_shift
> vect-pattern and makes a minor mid-end fix to support it.
>
> All 3 patches together bootstrapped and regression tested on aarch64.
>
> Ok for stage 1?
>
> gcc/ChangeLog:
>
>
On Thu, 12 Nov 2020, Joel Hutton wrote:
> Hi all,
>
> This patch adds support in the aarch64 backend for the vec_widen_shift
> vect-pattern and makes a minor mid-end fix to support it.
>
> All 3 patches together bootstrapped and regression tested on aarch64.
>
> Ok for stage 1?
diff --git a/g
