Re: RISC-V: fix a typo in riscv.h

2020-09-17 Thread Jeff Law via Gcc-patches
On 9/14/20 5:06 AM, Yeting Kuo via Gcc-patches wrote: > Hi Kito, > >>> Could you provide a test case for that? > I add the test case and update the git message. > RISC-V: fix a typo in riscv.h > > The missing parentheses would make shorten-memrefs pass give

Re: RISC-V: fix a typo in riscv.h

2020-09-14 Thread Yeting Kuo via Gcc-patches
Hi Kito, > > Could you provide a test case for that? > I add the test case and update the git message. RISC-V: fix a typo in riscv.h The missing parentheses would make shorten-memrefs pass give a wrong base when the offset of load/store is not multiple of 4. 2020-09-

Re: RISC-V: fix a typo in riscv.h

2020-09-14 Thread Kito Cheng via Gcc-patches
Hi Yeting: Could you provide a test case for that? On Mon, Sep 14, 2020 at 3:15 PM Yeting Kuo via Gcc-patches wrote: > > Hi all, > > The patch fixes a typo that would make some errors in fast-unaligned-access > targets. > > RISC-V: fix a typo in riscv.h > >

RISC-V: fix a typo in riscv.h

2020-09-14 Thread Yeting Kuo via Gcc-patches
Hi all, The patch fixes a typo that would make some errors in fast-unaligned-access targets. RISC-V: fix a typo in riscv.h 2020-09-14 Yeting Kuo gcc/ * config/riscv/riscv.h diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 9f67d82e74e..b7b4a1c88a5