Re: Machine Mode ICE in RISC-V when LTO

2023-09-15 Thread Robin Dapp via Gcc-patches
Hi Thomas, Jakub, is there anything we can do to assist from the riscv side in order to help with this? I haven't really been involved with it but was wondering what's missing. If I understand correctly Thomas has a major cleanup operation in plan but might not get to it soon. The fix he propos

RE: Machine Mode ICE in RISC-V when LTO

2023-08-10 Thread Li, Pan2 via Gcc-patches
org; richard.sandif...@arm.com; kito.ch...@gmail.com; Jeff Law ; juzhe.zh...@rivai.ai; Wang, Yanzhang Subject: RE: Machine Mode ICE in RISC-V when LTO Thanks Thomas for the information, great to learn you have a fix WIP. > ... is not sufficient: that runs into GTY issues, as the cur

RE: Machine Mode ICE in RISC-V when LTO

2023-08-10 Thread Li, Pan2 via Gcc-patches
Richard Biener ; Jakub Jelinek Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com; kito.ch...@gmail.com; Jeff Law ; juzhe.zh...@rivai.ai; Wang, Yanzhang Subject: RE: Machine Mode ICE in RISC-V when LTO Hi! On 2023-08-10T12:25:36+, "Li, Pan2" wrote: > Thanks Richard for com

RE: Machine Mode ICE in RISC-V when LTO

2023-08-10 Thread Thomas Schwinge
riginal author of 'lto_mode_identity_table' (see commit db847fa8f2cca6139188b8dfa0a7064319b19193 (Subversion r221005)), is there any reason not to do it this way? Grüße Thomas > -Original Message- > From: Richard Biener > Sent: Thursday, August 10, 2023 7:08 PM > To: