4 if no surprise from
tests.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, August 12, 2023 4:57 AM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang
Subject: Re: [PATCH v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn
On 8/8/23 21:05, pan2...@intel.com wrote:
From: Pan Li
In same cases, like gcc/testsuite/gcc.dg/pr78148.c in RISC-V, there will
be only 1 operand when SET_SRC in create_pre_exit. For example as below.
(insn 13 9 14 2 (clobber (reg/i:TI 10 a0))
"gcc/testsuite/gcc.dg/pr78148.c":24:1 -1
(e
