On Fri, Oct 24, 2014 at 7:09 PM, Joseph S. Myers
wrote:
> rs6000_hard_regno_nregs_internal allows SPE vectors in single
> registers satisfying SPE_SIMD_REGNO_P (i.e. register numbers 0 to
> 31). However, the corresponding test for e500 double treats all
> registers as being able to store a 64-bit
rs6000_hard_regno_nregs_internal allows SPE vectors in single
registers satisfying SPE_SIMD_REGNO_P (i.e. register numbers 0 to
31). However, the corresponding test for e500 double treats all
registers as being able to store a 64-bit value, rather than just
those GPRs.
Logically this inconsistenc