Hi Juzhe,
> Could you show me what the codegen looks like after this patch ?> I would be
> expecting the codegen become:
>
> foo:
> vsetvli a5,a0,e16,m1,ta,ma
> vmv.x.s a4,v8
> vadd.vx v9,v8,a4
> vsetvli zero,a5,e16,m1,ta,ma
> vadd.vv v8,v9,v8
> re
juzhe.zh...@rivai.ai
Subject: FW: [PATCH 2/2] RISC-V: Eliminate latter vsetvl when fused
FYI
-Original Message-
From: Bohan Lei
Sent: Wednesday, September 11, 2024 5:13 PM
To: gcc-patches
Subject: [PATCH 2/2] RISC-V: Eliminate latter vsetvl when fused
The current vsetvl pass eliminat