Re: [V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not

2023-09-29 Thread Jeff Law
On 9/12/23 13:09, Jivan Hakobyan via Gcc-patches wrote: In the case when we have C code like this int foo (int a) { return 100 & ~a; } GCC generates the following instruction sequence foo: not a0,a0 andia0,a0,100 ret This patch replaces that with this sequence

[V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not

2023-09-12 Thread Jivan Hakobyan via Gcc-patches
In the case when we have C code like this int foo (int a) { return 100 & ~a; } GCC generates the following instruction sequence foo: not a0,a0 andia0,a0,100 ret This patch replaces that with this sequence foo: li a5,100 andn a0,a5,a0 ret The profitabili