On Fri, Sep 11, 2020 at 8:43 AM Richard Biener
wrote:
> On Fri, Sep 11, 2020 at 8:27 AM Anton Youdkevitch
> wrote:
> >
> > Richard,
> >
> > On Thu, Sep 10, 2020 at 12:03 PM Richard Biener <
> richard.guent...@gmail.com> wrote:
> >>
> >> On Wed, Sep 9, 2020 at 5:51 PM Anton Youdkevitch
> >> wrot
On Fri, Sep 11, 2020 at 8:27 AM Anton Youdkevitch
wrote:
>
> Richard,
>
> On Thu, Sep 10, 2020 at 12:03 PM Richard Biener
> wrote:
>>
>> On Wed, Sep 9, 2020 at 5:51 PM Anton Youdkevitch
>> wrote:
>> >
>> > ThunderxT2 chip has an odd property that nested scalar FP min and max are
>> > slower tha
On Wed, Sep 9, 2020 at 5:51 PM Anton Youdkevitch
wrote:
>
> ThunderxT2 chip has an odd property that nested scalar FP min and max are
> slower than logically the same sequence of compares and branches.
Always for any input data?
> Here is the patch where I'm trying to implement that transformati
ThunderxT2 chip has an odd property that nested scalar FP min and max are
slower than logically the same sequence of compares and branches.
Here is the patch where I'm trying to implement that transformation.
Please advise if the "combine" pass (actually after the pass itself) is the
appropriate p
