Re: [PATCH v4 4/4] RISC-V: Fix vector SAT_ADD dump check due to middle-end change

2024-09-18 Thread Jeff Law
On 9/12/24 4:42 PM, pan2...@intel.com wrote: From: Pan Li This patch would like fix the dump check times of vector SAT_ADD. The middle-end change makes the match times from 2 to 4 times. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/Ch

[PATCH v4 4/4] RISC-V: Fix vector SAT_ADD dump check due to middle-end change

2024-09-12 Thread pan2 . li
From: Pan Li This patch would like fix the dump check times of vector SAT_ADD. The middle-end change makes the match times from 2 to 4 times. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/b