Re: [PATCH v4 1/3] RISC-V: Add support for XCVelw extension in CV32E40P

2023-12-15 Thread Jeff Law
On 12/12/23 12:32, Mary Bennett wrote: Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md Contributors: Mary Bennett Nandni Jamnadas Pietra Ferreira Charlie Keaney Jessica Mills Craig Blackmore Simon Cook Jeremy Bennett He

[PATCH v4 1/3] RISC-V: Add support for XCVelw extension in CV32E40P

2023-12-12 Thread Mary Bennett
Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md Contributors: Mary Bennett Nandni Jamnadas Pietra Ferreira Charlie Keaney Jessica Mills Craig Blackmore Simon Cook Jeremy Bennett Helene Chelin gcc/ChangeLog: * common/config/