From: Robin Dapp
This adds zero else operands to masked loads and their intrinsics.
I needed to adjust more than initially thought because we rely on
combine for several instructions and a change in a "base" pattern
needs to propagate to all those.
gcc/ChangeLog:
* config/aarch64/aarch6
> rdapp@gmail.com writes:
>> From: Robin Dapp
>>
>> This adds zero else operands to masked loads and their intrinsics.
>> I needed to adjust more than initially thought because we rely on
>> combine for several instructions and a change in a "base" pattern
>> needs to propagate to all those.
>
rdapp@gmail.com writes:
> From: Robin Dapp
>
> This adds zero else operands to masked loads and their intrinsics.
> I needed to adjust more than initially thought because we rely on
> combine for several instructions and a change in a "base" pattern
> needs to propagate to all those.
>
> For t
From: Robin Dapp
This adds zero else operands to masked loads and their intrinsics.
I needed to adjust more than initially thought because we rely on
combine for several instructions and a change in a "base" pattern
needs to propagate to all those.
For the lack of a better idea I used a function