Why not just check the prefix is 'v'? I don't think xtheadvector able
to work with other vector stuffs like vector crypto or any other new
vector stuffs, then we don't need extra attribute.
On Thu, Dec 21, 2023 at 12:42 PM Jeff Law wrote:
>
>
>
> On 12/20/23 15:48, 钟居哲 wrote:
> > >> So rather th
On 12/20/23 15:48, 钟居哲 wrote:
>> So rather than looking at the mode, would it make more sense to have an
attribute (or re-use an existing attribute) to identify which opcodes
are going to need prefixing? We've got access to the INSN via
current_output_insn. So we can lookup attributes triv
er.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-12-21 02:22
To: Jun Sha (Joshua); gcc-patches
CC: jim.wilson.gcc; palmer; andrew; philipp.tomsich; christoph.muellner;
juzhe.zhong; Jin Ma; Xianmiao Qu
Subject: Re: [PATCH v3 4/6] RISC-V: Adds the prefix "th." for the instructions
On 12/20/23 05:32, Jun Sha (Joshua) wrote:
This patch adds th. prefix to all XTheadVector instructions by
implementing new assembly output functions.
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_asm_output_opcode): New function.
* config/riscv/riscv.cc (riscv_a
This patch adds th. prefix to all XTheadVector instructions by
implementing new assembly output functions.
gcc/ChangeLog:
* config/riscv/riscv-protos.h
(riscv_asm_output_opcode): New function.
* config/riscv/riscv.cc (riscv_asm_output_opcode): Likewise.
* config/ri
