Subject: Re: [PATCH v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV
intrinsic
Hi Pan,
> +function_instance *
> +function_base::get_non_overloaded_instance (unsigned int code,
> + vec &arglist) const
> +{
> + unsi
Hi Pan,
+function_instance *
+function_base::get_non_overloaded_instance (unsigned int code,
+ vec &arglist) const
+{
+ unsigned int code_limit = vec_safe_length (registered_functions);
+
+ for (unsigned fun_code = code; fun_code < code_limit; fun_code
; Wang, Yanzhang ;
kito.cheng
Subject: Re: Re: [PATCH v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for
RVV intrinsic
More information:
For PRED_TYPE_tumu, it's easy to analyze, just need to count how many arguments
in the arglist.
If arglist has 5 arguments (mask, merge, op1, op2, len)
f the function_instance.
Then we can get the non-overloaeded function.
juzhe.zh...@rivai.ai
From: juzhe.zh...@rivai.ai
Date: 2023-09-15 10:02
To: pan2.li; gcc-patches
CC: pan2.li; yanzhang.wang; kito.cheng
Subject: Re: [PATCH v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV
intrinsic
6:46
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV
intrinsic
From: Pan Li
Update in v3:
* Rewrite comment for overloaded function add.
* Move get_non_overloaded_instance to function_base.
Update in v
It looks reasonable to me now.
But let's wait for kito's more comments.
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-09-12 16:46
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v3] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV
intrinsic
From: Pan Li
Update in v3:
* Rewrite comment for overloaded function add.
* Move get_non_overloaded_instance to function_base.
Update in v2:
* Add get_non_overloaded_instance for function instance.
* Fix overload check for policy function.
* Enrich the test cases check.
Original log:
This pa