Re: [PATCH v2 0/5] RISC-V big endian support

2021-03-23 Thread Jim Wilson
On Fri, Mar 19, 2021 at 9:22 AM Kito Cheng via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > On Mon, Mar 15, 2021 at 5:42 AM Marcus Comstedt wrote: > > I've now delved a bit deeper into the failure of the testcase > > gcc.c-torture/compile/pr35318.c on big endian RV32. > Looking at this testca

Re: [PATCH v2 0/5] RISC-V big endian support

2021-03-22 Thread Maciej W. Rozycki
On Sun, 14 Mar 2021, Marcus Comstedt wrote: > How would you like to proceed? I don't feel confident that I will > find a definitive solution to this issue anytime soon, but it feels > like such a weird special case (who passes 64-bit floats in 32-bit > integer registers to their asm?) that it mig

Re: [PATCH v2 0/5] RISC-V big endian support

2021-03-19 Thread Kito Cheng via Gcc-patches
Hi Marcus: Thank you for digging this issue out, I would suggest you sent v4 patch which only v3 + riscv_subword fix, and then merge into master first, and then sent separate patch for that issue, not sure what your fix, but I guess it might fix some code for IRA/LRA, so I think has a separate pat

Re: [PATCH v2 0/5] RISC-V big endian support

2021-03-14 Thread Marcus Comstedt
Hello again Kito. I've now delved a bit deeper into the failure of the testcase gcc.c-torture/compile/pr35318.c on big endian RV32. The point at which big endian diverges from little endian is where process_alt_operands() is processing the "%0" constraint. It calls operands_match_p(), which su

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-26 Thread Marcus Comstedt
Hi Kito. I fixed almost all of the rv32be testcase failures simply by taking endianness into account on the first line of riscv_subword, which is used for long long handling on 32-bit. Now, I only have one failing testcase (which does not also fail on little endian), and it's a doozy. The test

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-24 Thread Marcus Comstedt
Hi again. I've found the reason for the shift-and test fails. riscv.md does a match on (subreg:QI (and:SI ...) 0) Unfortunately, due to the way "subreg" is defined, this needs to be (subreg:QI (and:SI ...) 3) on big endian. I can fix the failures by duplicating the rule and making the

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-24 Thread Marcus Comstedt
Hi Kito, Kito Cheng writes: > I just spend some time on those two testcase, I think this those two > testcase could just skip in big-endinan. Well, that sounds like a pretty big cop out. If the software doesn't behave like we expect it too I feel we should at least have some idea _why_...

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-23 Thread Kito Cheng via Gcc-patches
Hi Marcus: I just spend some time on those two testcase, I think this those two testcase could just skip in big-endinan. > FAIL: gcc.target/riscv/shift-and-1.c scan-assembler-not andi > FAIL: gcc.target/riscv/shift-and-2.c scan-assembler-not andi However seems like rv32be has still has some stra

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-22 Thread Marcus Comstedt
Hi Kito, Kito Cheng writes: > FAIL: gcc.c-torture/execute/string-opt-5.c > FAIL: gcc.target/riscv/shift-and-1.c scan-assembler-not andi > FAIL: gcc.target/riscv/shift-and-2.c scan-assembler-not andi string-opt-5.c is one of the newlib issues I mentioned (handcoded assembler for strcmp which a

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-22 Thread Kito Cheng via Gcc-patches
Seems like only 3 fail are related to big-endian, you don't need to worry about other fails. FAIL: gcc.c-torture/execute/string-opt-5.c FAIL: gcc.target/riscv/shift-and-1.c scan-assembler-not andi FAIL: gcc.target/riscv/shift-and-2.c scan-assembler-not andi On Tue, Feb 23, 2021 at 10:38 AM Kito C

Re: [PATCH v2 0/5] RISC-V big endian support

2021-02-22 Thread Kito Cheng via Gcc-patches
Hi Marcus: Thanks for the quick update, I am testing your V2 patch now, the result seems really great now, some of fail case seems like not cause by big-endian patch, I am reviewing and comparing the fail case with the little-endian build. > Should I make a PR against riscv-newlib on GitHub, or w

[PATCH v2 0/5] RISC-V big endian support

2021-02-20 Thread Marcus Comstedt
This is an update to the patch series for big endian RISC-V support. Changes since last version: * Added documentation of -mbig-endian and -mlittle-endian * New patch: Fix soft-fp endianness setting * New patch: Fix trampoline generation on big endian * New patch: Update the shift-shif