subject:"\[PATCH v1 2\/2\] RISC\-V\: Add testcases for form 4 of signed scalar SAT_ADD"

Re: [PATCH v1 2/2] RISC-V: Add testcases for form 4 of signed scalar SAT_ADD

2024-09-22 Thread Kito Cheng

LGTM 於 2024年9月20日週五 10:21 寫道： > From: Pan Li > > Form 4: > #define DEF_SAT_S_ADD_FMT_4(T, UT, MIN, MAX) \ > T __attribute__((noinline))\ > sat_s_add_##T##_fmt_4 (T x, T y) \ > {

[PATCH v1 2/2] RISC-V: Add testcases for form 4 of signed scalar SAT_ADD

2024-09-19 Thread pan2 . li

From: Pan Li Form 4: #define DEF_SAT_S_ADD_FMT_4(T, UT, MIN, MAX) \ T __attribute__((noinline))\ sat_s_add_##T##_fmt_4 (T x, T y) \ { \ T sum;