; rdapp@gmail.com
Subject: Re: [PATCH V2] RISC-V: Fix incorrect code of reaching inaccessible
memory address
Lgtm, thanks
於 2023年5月24日 週三，10:39寫道：
> From: Juzhe-Zhong
>
> To fix this issue, we seperate Vl operand and normal operands.
>
> gcc/ChangeLog:
>
> * co
Lgtm, thanks
於 2023年5月24日 週三，10:39寫道：
> From: Juzhe-Zhong
>
> To fix this issue, we seperate Vl operand and normal operands.
>
> gcc/ChangeLog:
>
> * config/riscv/autovec.md: Adjust for new interface.
> * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
> (e
From: Juzhe-Zhong
To fix this issue, we seperate Vl operand and normal operands.
gcc/ChangeLog:
* config/riscv/autovec.md: Adjust for new interface.
* config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
(emit_nonvlmax_insn): Add AVL operand.
* config/r
