On 28/04/16 15:11, Claudiu Zissulescu wrote:
Sure thing, running for ARC700, using original implementation and enabled
guarded code for FPX handling:
[0x02a2] 0xc000 K Zld_s r0,[sp,0x0] : lw
[0x5000c0c0] => 0x : (w1) r0 <= 0x *
[0x02a4] 0
Hi,
> Where exactly does the test go wrong?
The test which fails is this one:
TEST_EQ (double, __DBL_MAX__, __DBL_MAX__, 1);
From the test file included in the patch.
> Can you show a trace of __eqdf2 with register values?
Sure thing, running for ARC700, using original implementation a
>
> Where exactly does the test go wrong?
I will try to trace it back when I develop it. It passed too long since then.
Probably something related with big-endian.
On 28/04/16 12:35, Claudiu Zissulescu wrote:
Besides, why would you change any of the code, apart from the argument
to #ifdef and the comments?
It is not working/giving wrong results. I think, the test shows you this if you
run it without all the libgcc mods.
I can't.
Where exactly does the
> Besides, why would you change any of the code, apart from the argument
> to #ifdef and the comments?
It is not working/giving wrong results. I think, the test shows you this if you
run it without all the libgcc mods.
On 18/04/16 15:33, Claudiu Zissulescu wrote:
OK to apply?
No. You are clobbering DBL0H.
Besides, why would you change any of the code, apart from the argument
to #ifdef and the comments?
OK to apply?
Claudiu
gcc/
2016-04-18 Claudiu Zissulescu
* testsuite/gcc.target/arc/ieee_eq.c: New test.
libgcc/
2016-04-18 Claudiu Zissulescu
* config/arc/ieee-754/eqdf2.S: Handle FPX NaN.
---
gcc/testsuite/gcc.target/arc/ieee_eq.c | 47 ++