Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

Hi! On Tue, Jun 23, 2020 at 01:20:53PM +0100, Richard Sandiford wrote: > SVE supports integer division btw. :-) So does Power (ISA 3.1, power10). > In summary, I'm not saying we should never define the inactive values > to be zero. I just think that we should leave it until it matters. > And I

Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

Jim Wilson writes: > On Tue, Jun 23, 2020 at 5:21 AM Richard Sandiford > wrote: >> MVE and Power both set inactive lanes to zero. But I'm not sure about RVV. >> AIUI, for RVV the approach instead would be to reduce the effective vector >> length for the final iteration of the vector loop, and I'

Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

On Tue, Jun 23, 2020 at 5:21 AM Richard Sandiford wrote: > MVE and Power both set inactive lanes to zero. But I'm not sure about RVV. > AIUI, for RVV the approach instead would be to reduce the effective vector > length for the final iteration of the vector loop, and I'm not sure > whether in tha

Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

Richard Biener writes: > On Tue, Jun 23, 2020 at 11:53 AM Richard Sandiford > wrote: >> >> Things have moved on due to the IRC conversation, but… >> >> "Kewen.Lin" writes: >> > on 2020/6/23 上午3:59, Richard Sandiford wrote: >> >> "Kewen.Lin" writes: >> >>> @@ -5167,6 +5167,24 @@ mode @var{n}. >>

Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

On Tue, Jun 23, 2020 at 11:53 AM Richard Sandiford wrote: > > Things have moved on due to the IRC conversation, but… > > "Kewen.Lin" writes: > > on 2020/6/23 上午3:59, Richard Sandiford wrote: > >> "Kewen.Lin" writes: > >>> @@ -5167,6 +5167,24 @@ mode @var{n}. > >>> > >>> This pattern is not allo

Re: [PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

Things have moved on due to the IRC conversation, but… "Kewen.Lin" writes: > on 2020/6/23 上午3:59, Richard Sandiford wrote: >> "Kewen.Lin" writes: >>> @@ -5167,6 +5167,24 @@ mode @var{n}. >>> >>> This pattern is not allowed to @code{FAIL}. >>> >>> +@cindex @code{lenload@var{m}} instruction p

[PATCH 1/7 v5] ifn/optabs: Support vector load/store with length

Hi Richard, Thanks for your comments! on 2020/6/23 上午3:59, Richard Sandiford wrote: > "Kewen.Lin" writes: >> @@ -5167,6 +5167,24 @@ mode @var{n}. >> >> This pattern is not allowed to @code{FAIL}. >> >> +@cindex @code{lenload@var{m}} instruction pattern >> +@item @samp{lenload@var{m}} >> +Pe