Re: [PATCH 1/6] i386: Properly encode vector registers in vector move

2020-03-10 Thread H.J. Lu
On Thu, Mar 5, 2020 at 3:47 PM Jeff Law wrote: > > On Sat, 2020-02-29 at 06:16 -0800, H.J. Lu wrote: > > On x86, when AVX and AVX512 are enabled, vector move instructions can > > be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512): > > > >0: c5 f9 6f d1 vmovdqa %

Re: [PATCH 1/6] i386: Properly encode vector registers in vector move

2020-03-05 Thread Jeff Law
On Sat, 2020-02-29 at 06:16 -0800, H.J. Lu wrote: > On x86, when AVX and AVX512 are enabled, vector move instructions can > be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512): > >0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2 >4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,

[PATCH 1/6] i386: Properly encode vector registers in vector move

2020-02-29 Thread H.J. Lu
On x86, when AVX and AVX512 are enabled, vector move instructions can be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512): 0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2 4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,%xmm2 We prefer VEX encoding over EVEX since VEX is sho