On Tue, Dec 04, 2018 at 02:33:59PM -0600, Paul Clarke wrote:
> On 12/04/2018 02:16 PM, Segher Boessenkool wrote:
> > On Tue, Dec 04, 2018 at 08:59:03AM -0600, Paul Clarke wrote:
> >> @@ -1612,7 +1608,8 @@ _mm_bsrli_si128 (__m128i __A, const int __N)
> >>const __v16qu zeros = { 0, 0, 0, 0, 0, 0,
On 12/04/2018 02:16 PM, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Dec 04, 2018 at 08:59:03AM -0600, Paul Clarke wrote:
>> Fix general endian and 32-bit mode issues found in the
>> compatibility implementations of the x86 vector intrinsics when running the
>> associated test suite tests. (The
Hi!
On Tue, Dec 04, 2018 at 08:59:03AM -0600, Paul Clarke wrote:
> Fix general endian and 32-bit mode issues found in the
> compatibility implementations of the x86 vector intrinsics when running the
> associated test suite tests. (The tests had been inadvertently made to PASS
> without actually
Fix general endian and 32-bit mode issues found in the
compatibility implementations of the x86 vector intrinsics when running the
associated test suite tests. (The tests had been inadvertently made to PASS
without actually running the test code. A later patch fixes this issue.)
In a few cases,
