在 2025/1/24 下午7:44, Richard Sandiford 写道:
Lulu Cheng writes:
在 2025/1/24 下午3:58, Richard Sandiford 写道:
Lulu Cheng writes:
在 2025/1/22 上午8:49, Xi Ruoyao 写道:
I have no problem with this patch.
But, I have always been confused about the use of reload_completed.
I can understand that it needs
Lulu Cheng writes:
> 在 2025/1/24 下午3:58, Richard Sandiford 写道:
>> Lulu Cheng writes:
>>> 在 2025/1/22 上午8:49, Xi Ruoyao 写道:
The second source register of this insn cannot be the same as the
destination register.
gcc/ChangeLog:
* config/loongarch/loongarch.md
在 2025/1/24 下午3:58, Richard Sandiford 写道:
Lulu Cheng writes:
在 2025/1/22 上午8:49, Xi Ruoyao 写道:
The second source register of this insn cannot be the same as the
destination register.
gcc/ChangeLog:
* config/loongarch/loongarch.md
(_alsl_reversesi_extended): Add '&' to the d
Lulu Cheng writes:
> 在 2025/1/22 上午8:49, Xi Ruoyao 写道:
>> The second source register of this insn cannot be the same as the
>> destination register.
>>
>> gcc/ChangeLog:
>>
>> * config/loongarch/loongarch.md
>> (_alsl_reversesi_extended): Add '&' to the destination
>> register const
在 2025/1/22 下午5:21, Xi Ruoyao 写道:
On Wed, 2025-01-22 at 10:53 +0800, Xi Ruoyao wrote:
On Wed, 2025-01-22 at 10:37 +0800, Lulu Cheng wrote:
在 2025/1/22 上午8:49, Xi Ruoyao 写道:
The second source register of this insn cannot be the same as the
destination register.
gcc/ChangeLog:
* conf
On Wed, 2025-01-22 at 10:53 +0800, Xi Ruoyao wrote:
> On Wed, 2025-01-22 at 10:37 +0800, Lulu Cheng wrote:
> >
> > 在 2025/1/22 上午8:49, Xi Ruoyao 写道:
> > > The second source register of this insn cannot be the same as the
> > > destination register.
> > >
> > > gcc/ChangeLog:
> > >
> > > * conf
On Wed, 2025-01-22 at 10:37 +0800, Lulu Cheng wrote:
>
> 在 2025/1/22 上午8:49, Xi Ruoyao 写道:
> > The second source register of this insn cannot be the same as the
> > destination register.
> >
> > gcc/ChangeLog:
> >
> > * config/loongarch/loongarch.md
> > (_alsl_reversesi_extended): Add '&
在 2025/1/22 上午8:49, Xi Ruoyao 写道:
The second source register of this insn cannot be the same as the
destination register.
gcc/ChangeLog:
* config/loongarch/loongarch.md
(_alsl_reversesi_extended): Add '&' to the destination
register constraint and append '0' to the fir
The second source register of this insn cannot be the same as the
destination register.
gcc/ChangeLog:
* config/loongarch/loongarch.md
(_alsl_reversesi_extended): Add '&' to the destination
register constraint and append '0' to the first source register
constraint