Re: [PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-12 Thread Vineet Gupta
:juzhe.zh...@rivai.ai>; Pan Li > <mailto:pan2...@intel.com>; Kito Cheng <mailto:kito.ch...@sifive.com>; > Vineet Gupta <mailto:vine...@rivosinc.com> > *Subject:* [PATCH 0/6] RISC-V: frm state-machine improvements > Hi, >   > This came out of

Re: [PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-11 Thread 钟居哲
t Gupta Date: 2025-05-10 04:27 To: gcc-patches CC: gnu-toolchain; Jeff Law; Robin Dapp; Juzhe Zhong; Pan Li; Kito Cheng; Vineet Gupta Subject: [PATCH 0/6] RISC-V: frm state-machine improvements Hi, This came out of Rivos perf team reporting (shoutout to Siavash) that some of the SPEC2017 w

Re: [PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-10 Thread Vineet Gupta
On 5/10/25 06:49, Jeff Law wrote: > On 5/9/25 2:27 PM, Vineet Gupta wrote: >> Hi, >> >> This came out of Rivos perf team reporting (shoutout to Siavash) that >> some of the SPEC2017 workloads had unnecessary FRM wiggles, when >> none were needed. The writes in particular could be expensive. >> >> I

Re: [PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-10 Thread Jeff Law
On 5/9/25 2:27 PM, Vineet Gupta wrote: Hi, This came out of Rivos perf team reporting (shoutout to Siavash) that some of the SPEC2017 workloads had unnecessary FRM wiggles, when none were needed. The writes in particular could be expensive. I started with reduced test for PR/119164 from blen

[PATCH 0/6] RISC-V: frm state-machine improvements

2025-05-09 Thread Vineet Gupta
Hi, This came out of Rivos perf team reporting (shoutout to Siavash) that some of the SPEC2017 workloads had unnecessary FRM wiggles, when none were needed. The writes in particular could be expensive. I started with reduced test for PR/119164 from blender:node_testure_util.c. However in trying