"juzhe.zh...@rivai.ai" writes:
> Hi, Richard.
>
> Here is an example for vsext.vf2.
>
> The general pattern for this instruction as follows:
>
> (set (operand 0) (unspec:...(operand 1)))
>
> We have a TARGET_MIN_VLEN macro which specify minimum VLEN according to -march
>
> Consider this case V16QI
3-11-24 02:18
To: 钟居哲
CC: gcc-patches; vmakarov; kito.cheng
Subject: Re: [PATCH 0/5] Add support for operand-specific alignment requirements
钟居哲 writes:
> Hi, Richard.
>
> Current define_mode_attr can only map an attribute for a mode.
> I wonder whether we can map a mode to multip
l to me. Could you explain
(conceptually) what kind of insn patterns you need?
Thanks,
Richard
>
>
> juzhe.zh...@rivai.ai
>
> From: Richard Sandiford
> Date: 2023-11-22 18:08
> To: juzhe.zhong\@rivai.ai
> CC: gcc-patches; vmakarov\@redhat.com; kito.cheng
> Subject:
dhat.com; kito.cheng
Subject: Re: [PATCH 0/5] Add support for operand-specific alignment requirements
"juzhe.zh...@rivai.ai" writes:
> Hi, Richard.
>
> Thanks for supporting register filter in IRA/LRA.
> I found it is useful for RVV since we have a set of widen operations that
"juzhe.zh...@rivai.ai" writes:
> Hi, Richard.
>
> Thanks for supporting register filter in IRA/LRA.
> I found it is useful for RVV since we have a set of widen operations that
> allow source register overlap highpart of dest register group
>
> For example, if vsext.vf2 v0(dest consume reg v0 and
Hi, Richard.
Thanks for supporting register filter in IRA/LRA.
I found it is useful for RVV since we have a set of widen operations that allow
source register overlap highpart of dest register group
For example, if vsext.vf2 v0(dest consume reg v0 and reg v1), v1 (source
consume v1 only)
I want
On 11/12/23 09:52, Richard Sandiford wrote:
SME has various instructions that require aligned register tuples.
However, the associated tuple modes are already widely used and do
not need to be aligned in other contexts. It therefore isn't
appropriate to force alignment in TARGET_HARD_REGNO_MOD
SME has various instructions that require aligned register tuples.
However, the associated tuple modes are already widely used and do
not need to be aligned in other contexts. It therefore isn't
appropriate to force alignment in TARGET_HARD_REGNO_MODE_OK.
There are also strided loads and stores t
