Re: [PATCH] x86_64: Implement V1TI mode shifts/rotates by a constant

2021-10-25 Thread Uros Bizjak via Gcc-patches
es natively in XMM registers, we should keep it there as much as possible, and even if the sequences look complicated at the first sight, they win in all cases. So, the patch is OK. Thanks, Uros. > Please let me know what you think. > Roger > -- > > -Original Message- >

RE: [PATCH] x86_64: Implement V1TI mode shifts/rotates by a constant

2021-10-25 Thread Roger Sayle
ode size win with -Os (ashl_8 is currently 39 bytes, shrinks to 5 bytes with this patch). Please let me know what you think. Roger -- -Original Message- From: Uros Bizjak Sent: 25 October 2021 09:02 To: Roger Sayle Cc: GCC Patches Subject: Re: [PATCH] x86_64: Implement V1TI mode shifts/r

Re: [PATCH] x86_64: Implement V1TI mode shifts/rotates by a constant

2021-10-25 Thread Uros Bizjak via Gcc-patches
On Sun, Oct 24, 2021 at 6:34 PM Roger Sayle wrote: > > > This patch provides RTL expanders to implement logical shifts and > rotates of 128-bit values (stored in vector integer registers) by > constant bit counts. Previously, GCC would transfer these values > to a pair of scalar registers (TImode

[PATCH] x86_64: Implement V1TI mode shifts/rotates by a constant

2021-10-24 Thread Roger Sayle
This patch provides RTL expanders to implement logical shifts and rotates of 128-bit values (stored in vector integer registers) by constant bit counts. Previously, GCC would transfer these values to a pair of scalar registers (TImode) via memory to perform the operation, then transfer the result