On Mon, Nov 18, 2024 at 09:32:29AM +0100, Andreas Krebbel wrote:
> Hi Stefan,
>
>
> On 11/12/24 10:35, Stefan Schulze Frielinghaus wrote:
> > > > + rtx cond = gen_rtx_LTU (mode, gen_rtx_REG (CCL1mode,
> > > > CC_REGNUM), const0_rtx);
> > > > + if (operands[4] == const0_rtx)
> > > > +emit_i
Hi Stefan,
On 11/12/24 10:35, Stefan Schulze Frielinghaus wrote:
+ rtx cond = gen_rtx_LTU (mode, gen_rtx_REG (CCL1mode, CC_REGNUM),
const0_rtx);
+ if (operands[4] == const0_rtx)
+emit_insn (gen_add3_carry1_cc (operands[0], operands[2],
operands[3]));
+ else
If we would just generate t
.UADDC \\(" 1 "optimized" { target
> > { ! lp64 } } } } */
> > +/* { dg-final { scan-assembler-times "\\talcr\\t" 1 } } */
> > +/* { dg-final { scan-assembler-times "\\talcgr\\t" 1 { target lp64 } } } */
>
> Your check
Hi Stefan,
thanks for the patch and sorry for the slow review.
On 9/18/24 19:25, Stefan Schulze Frielinghaus wrote:
Bootstrapped and regtested on s390. Both expander are constrained to
z196 because of the conditional moves. I guess this is reasonable
nowadays.
The reason for the limitation
Bootstrapped and regtested on s390. Both expander are constrained to
z196 because of the conditional moves. I guess this is reasonable
nowadays.
Would be great if you could have a second look that setting the
carry/borrow bit (bit 18 of the PSW) is indeed correct. Brain twisted
me at first ;-)
