Hi Stafford,
On 6/9/22 6:29 AM, Stafford Horne wrote:
>> diff --git a/gcc/config.gcc b/gcc/config.gcc
>> index c5064dd37666..0c3a09dfe810 100644
>> --- a/gcc/config.gcc
>> +++ b/gcc/config.gcc
>> @@ -2866,6 +2866,11 @@ or1k*-*-*)
>> done
>> TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG |
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index c5064dd37666..0c3a09dfe810 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -2866,6 +2866,11 @@ or1k*-*-*)
> done
> TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
>
> + case ${target} in
> + or1k*le*
While not officially sanctioned by the architecture spec, little-endian
or1k processors do exist in the wild, for example the Allwinner AR100.
Let's add native support for this, instead of hacks like using objcopy
to byteswap ELF file contents.
gcc/ChangeLog:
* config.gcc: Set TARGET_LITT
