Re: [PATCH] nvptx: Expand QI mode operations using SI mode instructions.

2022-02-10 Thread Tom de Vries via Gcc-patches
On 1/10/22 11:58, Roger Sayle wrote: One of the unusual target features of the Nvidia PTX ISA is that it doesn't provide QI mode (byte sized) operations or registers. [ FWIW: I recently happened to check this, and it actually supports .u8/.s8/.b8 regs, but indeed just for very few operations

[PATCH] nvptx: Expand QI mode operations using SI mode instructions.

2022-01-10 Thread Roger Sayle
One of the unusual target features of the Nvidia PTX ISA is that it doesn't provide QI mode (byte sized) operations or registers. Somewhat conventionally, 8-bit quantities are read from/written to memory using special instructions, but stored internally using SImode (32-bit) registers. GCC's midd