On Fri, Aug 4, 2023 at 1:30 AM Alexander Monakov wrote:
>
>
> On Thu, 27 Jul 2023, Liu, Hongtao via Gcc-patches wrote:
>
> > > +;; If the first and the second operands of ternlog are invariant and ;;
> > > +the third operand is memory ;; then we should add load third operand
> > > +from memory to
On Thu, 27 Jul 2023, Liu, Hongtao via Gcc-patches wrote:
> > +;; If the first and the second operands of ternlog are invariant and ;;
> > +the third operand is memory ;; then we should add load third operand
> > +from memory to register and ;; replace first and second operands with
> > +this reg
> -Original Message-
> From: Yan Simonaytes
> Sent: Wednesday, July 26, 2023 2:11 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Liu, Hongtao ; Uros Bizjak ;
> Yan Simonaytes
> Subject: [PATCH] Replace invariant ternlog operands
>
> Sometimes GCC generates ternl
Sometimes GCC generates ternlog with three operands, but some of them are
invariant.
For example:
vpternlogq $252, %zmm2, %zmm1, %zmm0
In this case zmm1 register isnt used by ternlog.
So should replace zmm1 with zmm0 or zmm2:
vpternlogq $252, %zmm0, %zmm1, %zmm0
When the third operan
