On 12/14/2021 9:53 AM, Jakub Jelinek via Gcc-patches wrote:
On Thu, Dec 09, 2021 at 05:32:02PM +, Hafiz Abid Qadeer wrote:
Commit 13b6c7639cf assumed that registers in a span will be in a certain
order. But that assumption is not true at least for the big endian targets.
Currently amdgcn i
On Thu, Dec 09, 2021 at 05:32:02PM +, Hafiz Abid Qadeer wrote:
> Commit 13b6c7639cf assumed that registers in a span will be in a certain
> order. But that assumption is not true at least for the big endian targets.
> Currently amdgcn is probably only target where CFA is split into multiple
> r
On 12/9/2021 10:32 AM, Hafiz Abid Qadeer wrote:
Commit 13b6c7639cf assumed that registers in a span will be in a certain
order. But that assumption is not true at least for the big endian targets.
Currently amdgcn is probably only target where CFA is split into multiple
registers so build_span
Commit 13b6c7639cf assumed that registers in a span will be in a certain
order. But that assumption is not true at least for the big endian targets.
Currently amdgcn is probably only target where CFA is split into multiple
registers so build_span_loc is only gets called for it. However, the
dwf_cfa
