zhong
CC: gcc-patches; kito.cheng
Subject: Re: [PATCH] RISC-V: Support load/store in mov pattern for RVV
modes.
On Okt 24 2022, juzhe.zh...@rivai.ai wrote:
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/mov-1.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/ba
On Okt 24 2022, juzhe.zh...@rivai.ai wrote:
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/mov-1.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/mov-10.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/mov-11.c
> create mode 100644 gcc/testsuite/gcc.ta
Verified and committed to trunk, thanks!
And don't forgot changelog next time :P
On Mon, Oct 24, 2022 at 10:09 AM wrote:
>
> From: Ju-Zhe Zhong
>
> ---
> gcc/config.gcc| 2 +-
> gcc/config/riscv/constraints.md | 22 +
> gcc/config/riscv/predicate
From: Ju-Zhe Zhong
---
gcc/config.gcc| 2 +-
gcc/config/riscv/constraints.md | 22 +
gcc/config/riscv/predicates.md| 23 ++
gcc/config/riscv/riscv-protos.h | 14 +
gcc/config/riscv/riscv-v.cc | 180
