钟居哲; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; Jeff Law
Subject: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt
>>> I can't really match spec and code. For the lmul = 2 case sure,
>>> but W84 e.g. allows v4 and not v6? What actually is "highes
Jeff Law
Subject: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt
>>> I can't really match spec and code. For the lmul = 2 case sure,
>>> but W84 e.g. allows v4 and not v6? What actually is "highest-numbered
>>> part"?
> Yes.
>
>
>>> I can't really match spec and code. For the lmul = 2 case sure,
>>> but W84 e.g. allows v4 and not v6? What actually is "highest-numbered
>>>part"?
> Yes.
>
> For vwcvt, LMUL 4 -> LMUL 8.
> We allow overlap vwcvt v0 (occupy v0 - v7), v4 (occupy v4 - v7)
> This patch support the overlap ab
uzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support highpart register overlap for vwcvt
Looks like this already went in while I was looking at it...
In general it looks ok to me but I would have really hoped
for some more comments.
>
Looks like this already went in while I was looking at it...
In general it looks ok to me but I would have really hoped
for some more comments.
> +;; These following constraints are used by RVV instructions with dest EEW >
> src EEW.
> +;; RISC-V 'V' Spec 5.2. Vector Operands:
> +;; The destinat
> Co-authored-by: kito-cheng
>
> in changelog.
>
>
> No other difference.
>
>
> juzhe.zh...@rivai.ai
>
>
> From: Juzhe-Zhong
> Date: 2023-11-29 16:34
> To: gcc-patches
> CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juz
: Support highpart register overlap for vwcvt
Since Richard supports register filters recently, we are able to support
highpart register
overlap for widening RVV instructions.
This patch support it for vwcvt intrinsics.
I leverage real application user codes for vwcvt:
https://github.com/riscv/riscv
Since Richard supports register filters recently, we are able to support
highpart register
overlap for widening RVV instructions.
This patch support it for vwcvt intrinsics.
I leverage real application user codes for vwcvt:
https://github.com/riscv/riscv-v-spec/issues/929
https://godbolt.org/z/x
Since Richard supports register filters recently, we are able to support
highpart register
overlap for widening RVV instructions.
This patch support it for vwcvt intrinsics.
I leverage real application user codes for vwcvt:
https://github.com/riscv/riscv-v-spec/issues/929
https://godbolt.org/z/x
