Hi Juzhe,
thanks looks pretty comprehensive already.
> +(define_expand "vec_perm"
> + [(match_operand:V 0 "register_operand")
> + (match_operand:V 1 "register_operand")
> + (match_operand:V 2 "register_operand")
> + (match_operand: 3 "vector_perm_operand")]
> + "TARGET_VECTOR && GET_MODE_
From: Juzhe-Zhong
This patch supports vector permutation for VLS only by vec_perm pattern.
We will support TARGET_VECTORIZE_VEC_PERM_CONST to support VLA permutation
in the future.
gcc/ChangeLog:
* config/riscv/autovec.md (vec_perm): New pattern.
* config/riscv/predicates.md (ve
