Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-29 Thread Richard Biener
On Wed, Aug 28, 2024 at 4:39 PM Robin Dapp wrote: > > > On Wed, Aug 28, 2024 at 3:21 PM Robin Dapp wrote: > > > > > > > Hmm - but how can you call this ambiguous? VLEN and LMUL is a runtime > > > > property(?), so unknown to the compiler(?) - as you do below the only > > > > way to code generate

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-28 Thread Robin Dapp
> On Wed, Aug 28, 2024 at 3:21 PM Robin Dapp wrote: > > > > > Hmm - but how can you call this ambiguous? VLEN and LMUL is a runtime > > > property(?), so unknown to the compiler(?) - as you do below the only > > > way to code generate would be a agnostic way such as with a slide-down. > > > But c

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-28 Thread Richard Biener
On Wed, Aug 28, 2024 at 3:21 PM Robin Dapp wrote: > > > Hmm - but how can you call this ambiguous? VLEN and LMUL is a runtime > > property(?), so unknown to the compiler(?) - as you do below the only > > way to code generate would be a agnostic way such as with a slide-down. > > But can't you alw

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-28 Thread Robin Dapp
> Hmm - but how can you call this ambiguous? VLEN and LMUL is a runtime > property(?), so unknown to the compiler(?) - as you do below the only > way to code generate would be a agnostic way such as with a slide-down. > But can't you always to this, for all subregs of this sort (even with offset)?

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-28 Thread Richard Biener
On Tue, Aug 27, 2024 at 4:03 PM Robin Dapp wrote: > > Hi, > > this is a hopefully better way to solve the "subreg problem" by first, > in the generic case, have the RA go via memory and second, providing a > vector-vector extract that deals with it in an optimized way. > > When the source mode is

Re: Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-27 Thread 钟居哲
LGTM juzhe.zh...@rivai.ai From: Robin Dapp Date: 2024-08-28 03:48 To: juzhe.zh...@rivai.ai; gcc-patches CC: pal...@dabbelt.com; kito.ch...@gmail.com; jeffreya...@gmail.com; pan2...@intel.com; Robin Dapp Subject: Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-27 Thread Robin Dapp
> +(define_mode_iterator V_HAS_HALF [ > + V2QI V4QI V8QI V16QI V32QI V64QI V128QI V256QI V512QI V1024QI V2048QI > V4096QI > + V2HI V4HI V8HI V16HI V32HI V64HI V128HI V256HI V512HI V1024HI V2048HI > + V2SI V4SI V8SI V16SI V32SI V64SI V128SI V256SI V512SI V1024SI > + V2DI V4DI V8DI V16DI V32DI V

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-27 Thread Jeff Law
On 8/27/24 8:02 AM, Robin Dapp wrote: Hi, this is a hopefully better way to solve the "subreg problem" by first, in the generic case, have the RA go via memory and second, providing a vector-vector extract that deals with it in an optimized way. When the source mode is potentially larger tha

Re: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-27 Thread juzhe.zh...@rivai.ai
om; pan2...@intel.com; rdapp....@gmail.com Subject: [PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086]. Hi, this is a hopefully better way to solve the "subreg problem" by first, in the generic case, have the RA go via memory and second, providing a vector-vector extra

[PATCH] RISC-V: Fix subreg of VLS modes larger than a vector [PR116086].

2024-08-27 Thread Robin Dapp
Hi, this is a hopefully better way to solve the "subreg problem" by first, in the generic case, have the RA go via memory and second, providing a vector-vector extract that deals with it in an optimized way. When the source mode is potentially larger than one vector (e.g. an LMUL2 mode for VLEN=1