Re: [PATCH] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]

On 9/6/23 03:47, Juzhe-Zhong wrote: This patch fix incorrect mode tieable between DI and V2SI which cause ICE in RA. PR target/111296 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix bug. gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/pr111

[PATCH] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]

This patch fix incorrect mode tieable between DI and V2SI which cause ICE in RA. PR target/111296 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix bug. gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/pr111296.C: New test. --- gcc/config/riscv/r