[PATCH] RISC-V: Fix for icache flush issue on multicore processors.

2018-01-02 Thread Jim Wilson
The gcc-7-branch version of the patch, tested same as the mainline patch. Committed. gcc/ * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New. * config/riscv/riscv.md (clear_cache): Use it. --- gcc/config/riscv/linux.h | 2 ++ gcc/config/riscv/riscv.md | 6 ++ 2 files cha

[PATCH] RISC-V: Fix for icache flush issue on multicore processors.

2018-01-02 Thread Jim Wilson
The RISC-V ISA defines fence.i as flushing the icache on the current hart (hardware thread, aka core) and not on any other hart. If the linux kernel moves a process to a different hart in between writes to code, and the following fence.i instruction, then the result is indeterminate. To fix this,