Re: [PATCH] RISC-V: Emit vector shift pattern for const_vector [PR117353].

2024-12-13 Thread 钟居哲
LGTM. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2024-12-12 18:43 To: gcc-patches CC: pal...@dabbelt.com; kito.ch...@gmail.com; juzhe.zh...@rivai.ai; jeffreya...@gmail.com; pan2...@intel.com; rdapp@gmail.com Subject: [PATCH] RISC-V: Emit vector shift pattern for const_vector [PR117353

[PATCH] RISC-V: Emit vector shift pattern for const_vector [PR117353].

2024-12-12 Thread Robin Dapp
Hi, in PR117353 and PR117878 we expand a const vector during reload. For this we use an unpredicated left shift. Normally an insn like this is split but as we introduce it late and cannot create pseudos anymore it remains unpredicated and is not recognized by the vsetvl pass (where we expect all