Re: [PATCH] RISC-V: Add RVV registers in TARGET_CONDITION_AL_REGISTER_USAGE

Committed with title fix, that should be TARGET_CONDITIONAL_REGISTER_USAGE On Tue, Aug 30, 2022 at 2:28 PM wrote: > > From: zhongjuzhe > > gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_conditional_register_usage): Add RVV > registers. > > --- > gcc/config/riscv/riscv.cc | 9 +++

[PATCH] RISC-V: Add RVV registers in TARGET_CONDITION_AL_REGISTER_USAGE

From: zhongjuzhe gcc/ChangeLog: * config/riscv/riscv.cc (riscv_conditional_register_usage): Add RVV registers. --- gcc/config/riscv/riscv.cc | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 50de6a83cba..aebe3c0ab6