On 02/10/14 09:49, Andrew Pinski wrote:
On Fri, Sep 19, 2014 at 1:43 PM, Jeff Law wrote:
On 09/15/14 08:33, Jiong Wang wrote:
Jeff,
thanks, I partially understand your meaning here.
take the function "ira_implicitly_set_insn_hard_regs" in ira-lives.c
for example,
when generatin
On Fri, Sep 19, 2014 at 1:43 PM, Jeff Law wrote:
> On 09/15/14 08:33, Jiong Wang wrote:
>>
>>
>> Jeff,
>>
>> thanks, I partially understand your meaning here.
>>
>>take the function "ira_implicitly_set_insn_hard_regs" in ira-lives.c
>> for example,
>>
>>when generating address rtl, gcc w
On 25/09/14 12:25, Christophe Lyon wrote:
On 24 September 2014 20:32, Jiong Wang wrote:
On 22/09/14 19:01, Jeff Law wrote:
On 09/22/14 04:29, Jiong Wang wrote:
On 19/09/14 21:43, Jeff Law wrote:
patch attached.
please review, thanks.
gcc/
* shrink-wrap.c (move_insn_for_shrink_wrap):
On 24 September 2014 20:32, Jiong Wang wrote:
>
> On 22/09/14 19:01, Jeff Law wrote:
>>
>> On 09/22/14 04:29, Jiong Wang wrote:
>>>
>>> On 19/09/14 21:43, Jeff Law wrote:
>>>
>>> patch attached.
>>>
>>> please review, thanks.
>>>
>>> gcc/
>>> * shrink-wrap.c (move_insn_for_shrink_wrap): Add fu
On 22/09/14 19:01, Jeff Law wrote:
On 09/22/14 04:29, Jiong Wang wrote:
On 19/09/14 21:43, Jeff Law wrote:
patch attached.
please review, thanks.
gcc/
* shrink-wrap.c (move_insn_for_shrink_wrap): Add further check when
!REG_P (src) to
release more instruction sink opportunities.
gcc
On 09/22/14 04:29, Jiong Wang wrote:
On 19/09/14 21:43, Jeff Law wrote:
On 09/15/14 08:33, Jiong Wang wrote:
Jeff,
thanks, I partially understand your meaning here.
take the function "ira_implicitly_set_insn_hard_regs" in ira-lives.c
for example,
when generating address rtl, gcc
On 19/09/14 21:43, Jeff Law wrote:
On 09/15/14 08:33, Jiong Wang wrote:
Jeff,
thanks, I partially understand your meaning here.
take the function "ira_implicitly_set_insn_hard_regs" in ira-lives.c
for example,
when generating address rtl, gcc will automatically generate "const"
op
On 09/15/14 08:33, Jiong Wang wrote:
Jeff,
thanks, I partially understand your meaning here.
take the function "ira_implicitly_set_insn_hard_regs" in ira-lives.c
for example,
when generating address rtl, gcc will automatically generate "const"
operator to prefix
the address express
On 09/11/14 14:58, Wang Jiong wrote:
the reg_found will record the # of registers, and there will be a
check to make sure no register or just 1 register in the src.
so if "reg_found" is bigger than 1, then src will be assigned to
NULL_RTX, that we just stop the move.
+ if (arg.n
On 11/09/14 21:39, Jeff Law wrote:
On 09/08/14 07:57, Jiong Wang wrote:
Conceptually OK. Some questions/concerns about the implementation.
Hi Jeff,
thanks very much for your review.
It seems to me that what you're trying to describe on the RHS is
REG_P || CONSTANT_P
yes.
and a
2014-09-11 21:39 GMT+01:00 Jeff Law :
>
> On 09/08/14 07:57, Jiong Wang wrote:
>>>
>>> Conceptually OK. Some questions/concerns about the implementation.
>>
>> Hi Jeff,
>>
>>thanks very much for your review.
>>>
>>> It seems to me that what you're trying to describe on the RHS is
>>> REG_P ||
On 09/08/14 07:57, Jiong Wang wrote:
Conceptually OK. Some questions/concerns about the implementation.
Hi Jeff,
thanks very much for your review.
It seems to me that what you're trying to describe on the RHS is
REG_P || CONSTANT_P
yes.
and actually I am trying to detect all rtx wh
On 05/09/14 20:48, Jeff Law wrote:
On 09/04/14 08:15, Jiong Wang wrote:
this patch relax the restriction on src to accept any one of the following:
+ REG
+ CONST_OBJ, like SYMBOL_REF
+ combination of single REG and any other CONST_OBJs.
(reg def/use calculation will not affect
On 09/04/14 08:15, Jiong Wang wrote:
currently, the instruction sink in "prepare_shrink_wrap" is a bit
conservative
that some further optimization opportunities have been missed.
given the prologue use register A by:
(store A, [sp + offset])
then given the entry_basic_block contains a simpl
currently, the instruction sink in "prepare_shrink_wrap" is a bit conservative
that some further optimization opportunities have been missed.
given the prologue use register A by:
(store A, [sp + offset])
then given the entry_basic_block contains a simply register copy like:
(move A, B)
c
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