On Fri, Feb 22, 2019 at 06:20:51PM -0600, Jakub Jelinek wrote:
> Hi!
>
> The testcase in the PR doesn't hoist any memory loads from the large switch
> before the switch on aarch64 and arm (unlike e.g. x86), because the
> arm/aarch64 casesi patterns don't properly annotate the memory load from the
On Wed, Feb 27, 2019 at 02:43:01PM +, Kyrill Tkachov wrote:
> As discussed on IRC, I've bootstrapped and tested this on
> arm-none-linux-gnueabihf.
Thanks for doing that. I've committed the config/arm/ changes, they really
don't depend on the aarch64 changes or vice versa.
> So from an arm p
Hi Jakub,
On 2/27/19 10:56 AM, Jakub Jelinek wrote:
On Mon, Feb 25, 2019 at 10:23:52AM +, Kyrill Tkachov wrote:
The only bootstraps I'm doing are distro builds with
--with-tune=generic-armv7-a --with-arch=armv7-a \
--with-float=hard --with-fpu=vfpv3-d16 --with-abi=aapcs-
On 27/02/2019 10:56, Jakub Jelinek wrote:
> On Mon, Feb 25, 2019 at 10:23:52AM +, Kyrill Tkachov wrote:
>>> The only bootstraps I'm doing are distro builds with
>>> --with-tune=generic-armv7-a --with-arch=armv7-a \
>>> --with-float=hard --with-fpu=vfpv3-d16 --with-abi=aapcs-li
On Mon, Feb 25, 2019 at 10:23:52AM +, Kyrill Tkachov wrote:
> > The only bootstraps I'm doing are distro builds with
> > --with-tune=generic-armv7-a --with-arch=armv7-a \
> > --with-float=hard --with-fpu=vfpv3-d16 --with-abi=aapcs-linux
> > I don't have setup nor experience wi
Hi Jakub,
On 2/25/19 10:19 AM, Jakub Jelinek wrote:
On Mon, Feb 25, 2019 at 10:05:46AM +, Kyrill Tkachov wrote:
Hi Jakub,
On 2/23/19 12:20 AM, Jakub Jelinek wrote:
Hi!
The testcase in the PR doesn't hoist any memory loads from the large
switch
before the switch on aarch64 and arm (unlike
On Mon, Feb 25, 2019 at 10:05:46AM +, Kyrill Tkachov wrote:
> Hi Jakub,
>
> On 2/23/19 12:20 AM, Jakub Jelinek wrote:
> > Hi!
> >
> > The testcase in the PR doesn't hoist any memory loads from the large
> > switch
> > before the switch on aarch64 and arm (unlike e.g. x86), because the
> > arm
Hi Jakub,
On 2/23/19 12:20 AM, Jakub Jelinek wrote:
Hi!
The testcase in the PR doesn't hoist any memory loads from the large
switch
before the switch on aarch64 and arm (unlike e.g. x86), because the
arm/aarch64 casesi patterns don't properly annotate the memory load
from the
jump table. I
Hi!
The testcase in the PR doesn't hoist any memory loads from the large switch
before the switch on aarch64 and arm (unlike e.g. x86), because the
arm/aarch64 casesi patterns don't properly annotate the memory load from the
jump table. It is created by gen_* and in RTL directly one can't specify
