On December 13, 2019 12:54:08 AM GMT+01:00, Jakub Jelinek
wrote:
>On Thu, Dec 12, 2019 at 04:59:40PM +0100, Richard Biener wrote:
>> >If it starts being ambiguous somewhere, could we use some target
>macro
>> >or
>> >target hook to decide?
>>
>> Ambiguous IL is bad :/ IL semantics dependent on
On Thu, Dec 12, 2019 at 04:59:40PM +0100, Richard Biener wrote:
> >If it starts being ambiguous somewhere, could we use some target macro
> >or
> >target hook to decide?
>
> Ambiguous IL is bad :/ IL semantics dependent on a target hook, too. Just
> look at SHIFT_COUNT_TRUNCATED...
This is so
On Thu, Dec 12, 2019 at 04:59:40PM +0100, Richard Biener wrote:
> >If it starts being ambiguous somewhere, could we use some target macro
> >or
> >target hook to decide?
>
> Ambiguous IL is bad :/ IL semantics dependent on a target hook, too. Just
> look at SHIFT_COUNT_TRUNCATED...
The compar
On December 12, 2019 10:53:26 AM GMT+01:00, Jakub Jelinek
wrote:
>On Thu, Dec 12, 2019 at 09:22:47AM +, Richard Sandiford wrote:
>> > So there's no whole vector equality RTX but we have to pun to
>integer
>> > modes for that? The eq:SImode would suggest that. Guess we should
>have
>> > used
On Thu, Dec 12, 2019 at 09:22:47AM +, Richard Sandiford wrote:
> > So there's no whole vector equality RTX but we have to pun to integer
> > modes for that? The eq:SImode would suggest that. Guess we should have
> > used a BImode vector representation...
Probably something like
V2BImode/V4BI
Richard Biener writes:
> On December 12, 2019 12:56:01 AM GMT+01:00, Jakub Jelinek
> wrote:
>>Hi!
>>
>>The AVX512{F,VL} vector comparisons that set %kN registers are
>>represented
>>in RTL as comparisons with vector mode operands and scalar integral
>>result,
>>where at runtime the scalar intege
On December 12, 2019 12:56:01 AM GMT+01:00, Jakub Jelinek
wrote:
>Hi!
>
>The AVX512{F,VL} vector comparisons that set %kN registers are
>represented
>in RTL as comparisons with vector mode operands and scalar integral
>result,
>where at runtime the scalar integer is filled with a bitmask.
>Unfort
Hi!
The AVX512{F,VL} vector comparisons that set %kN registers are represented
in RTL as comparisons with vector mode operands and scalar integral result,
where at runtime the scalar integer is filled with a bitmask.
Unfortunately, simplify_relational_operation would fold e.g.
(eq:SI (reg:V32HI x)