Re: [PATCH] Fix gen_lowpart_for_combine (PR rtl-optimization/92510)

2019-11-27 Thread Segher Boessenkool
On Wed, Nov 27, 2019 at 10:03:10AM +0100, Jakub Jelinek wrote: > and it is just combine subst + simplification that turns it into > ... (subreg:DI (subreg:V1DI (ne:DI (reg:CCZ 17 flags) (const_int 0 [0])) 0) > 0) ... > The restriction that subreg must be of a reg or mem certainly isn't honored > i

Re: [PATCH] Fix gen_lowpart_for_combine (PR rtl-optimization/92510)

2019-11-27 Thread Jakub Jelinek
On Tue, Nov 26, 2019 at 07:20:43PM -0600, Segher Boessenkool wrote: > Hi! > > On Wed, Nov 27, 2019 at 12:51:35AM +0100, Jakub Jelinek wrote: > > As mentioned in the PR, on the following testcase we ICE during combine. > > We have (subreg:V1DI (ne:DI (reg:CC flags) (const_int 0)) 0) and > > A subr

Re: [PATCH] Fix gen_lowpart_for_combine (PR rtl-optimization/92510)

2019-11-26 Thread Segher Boessenkool
Hi! On Wed, Nov 27, 2019 at 12:51:35AM +0100, Jakub Jelinek wrote: > As mentioned in the PR, on the following testcase we ICE during combine. > We have (subreg:V1DI (ne:DI (reg:CC flags) (const_int 0)) 0) and A subreg of something that is not a reg (or mem, if your port still does that) is invali

[PATCH] Fix gen_lowpart_for_combine (PR rtl-optimization/92510)

2019-11-26 Thread Jakub Jelinek
Hi! As mentioned in the PR, on the following testcase we ICE during combine. We have (subreg:V1DI (ne:DI (reg:CC flags) (const_int 0)) 0) and gen_lowpart_for_combine turns that into (ne:V1DI (reg:CC flags) (const_int 0)) which looks wrong to me, later on the if_then_else simplifications try to sim