Re: [PATCH] Fix ICE with AVX512F and AMD tuning (PR target/70300)

2016-03-21 Thread Kirill Yukhin
Hi Jakub, On 21 Mar 21:10, Jakub Jelinek wrote: > vec_interleave_lowv4sf only supports =x, x, x alternative, not =v, v, v > (which should be supportable for AVX512VL only anyway, but probably > stage1 material), without AVX512VL and with ext sse reg input operand > we have to either due to interlea

[PATCH] Fix ICE with AVX512F and AMD tuning (PR target/70300)

2016-03-21 Thread Jakub Jelinek
Hi! vec_interleave_lowv4sf only supports =x, x, x alternative, not =v, v, v (which should be supportable for AVX512VL only anyway, but probably stage1 material), without AVX512VL and with ext sse reg input operand we have to either due to interleaving or broadcast in the destination, or disable th