On 10/31/19 5:41 PM, Jim Wilson wrote:
> The RISC-V backend wants to use a libcall when optimizing for size if
> more than 6 instructions are needed. Emit_move_complex asks for no
> libcalls. This case requires 8 insns for rv64 and 16 insns for rv32,
> so we get fallback code that emits a loop.
On Thu, Oct 31, 2019 at 4:41 PM Jim Wilson wrote:
> gcc/
> PR middle-end/92263
> * expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when
> optimize_insn_for_speed_p is true.
>
> gcc/testsuite/
> PR middle-end/92263
> * gcc.dg/pr92263.
The RISC-V backend wants to use a libcall when optimizing for size if
more than 6 instructions are needed. Emit_move_complex asks for no
libcalls. This case requires 8 insns for rv64 and 16 insns for rv32,
so we get fallback code that emits a loop. Commit_one_edge_insertion
doesn't allow code in