From: Richard Henderson
Date: Mon, 24 Oct 2011 14:05:28 -0700
> You shouldn't need to split these anymore. See the enabled attribute, as
> used on several other targets so far.
See the patch I posted 2 hours after this one.
On 10/23/2011 08:53 PM, David Miller wrote:
> -(define_insn "*movsi_insn"
> +(define_insn "*movsi_insn_novis3"
>[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m,!f,!f,!m,d,d")
> (match_operand:SI 1 "input_operand" "rI,K,m,rJ,f,m,f,J,P"))]
> - "(register_operand (operands[0],
The non-trivial aspects (and what took the most time for me) of these
changes are:
1) Getting the register move costs and class preferencing right such
that the VIS3 moves do get effectively used for incoming
float/vector argument passing on 32-bit, yet IRA and reload don't
go nuts alloc
